1. Field of the Invention
The present invention relates to an electronic parts built-in substrate and, more particularly, an electronic parts built-in substrate having a structure in which electronic parts are packaged in a multi-layered fashion in a state that these electronic parts are buried in insulating films and a method of manufacturing the same.
2. Description of the Prior Art
The development of the LSI technology serving as a key technology to implement the multimedia devices is proceeding steadily to a higher speed and a larger capacity in data transmission. With this development, a higher density in the packaging technology serving as the interface between LSI and the electronic device is advanced.
In reply to the request for the higher density, the electronic parts built-in substrate having the structure in which electronic parts are packaged on the wiring substrate in a multi-layered fashion in a state that semiconductor chips are buried in the insulating film was developed. As an example, in Patent Literature 1 (Patent Application Publication (KOKAI) Hei 11-274734), it is set forth that the multi-layered wiring structure is formed by flip-chip connecting a bare chip on the wiring substrate, then forming an insulating film on the bare chip, then forming wiring patterns on the insulating film, and then repeating these steps plural times.
Meanwhile, in the production of the above electronic parts built-in substrate, upon forming the insulating film on the semiconductor chip, such insulating film is formed in the situation that a level difference is caused due to a thickness of the semiconductor chip. If the level difference is caused in the insulating film on the semiconductor chip, defocus is liable to occur in the photolithography applied to form the wiring patterns on the insulating film. Thus, it becomes difficult to form the wiring patterns on the insulating film with good precision.
Further, since a level difference is also caused in the wiring patterns formed on the insulating film, there is a possibility of lowering the reliability of the electric bonding applied to flip-chip bond the upper semiconductor chip to the wiring patterns.
Therefore, the technology capable of forming easily the flat insulating film on the semiconductor chip is desired.